Design Recipes for FPGAs: Using Verilog and VHDL 2nd Edition-电子书百科大全

Design Recipes for FPGAs: Using Verilog and VHDL 2nd Edition book cover

Design Recipes for FPGAs: Using Verilog and VHDL 2nd Edition

Author(s): Peter Wilson (Author)

Publisher: Newnes
Publication Date: 21 Sept. 2015
Edition: 2nd
Language: English
Print length: 392 pages
ISBN-10: 0080971296
ISBN-13: 9780080971292

Book Description

Design Recipes for FPGAs provides a rich toolbox of design techniques and templates to solve practical, every-day problems using FPGAs. Using a modular structure, it provides design techniques and templates at all levels, together with functional code, which you can easily match and apply to your application. Written in an informal and easy to grasp style, this invaluable resource goes beyond the principles of FPGAs and hardware description languages to demonstrate how specific designs can be synthesized, simulated and downloaded onto an FPGA. In addition, the book provides advanced techniques to create ‘real world’ designs that fit the device required and which are fast and reliable to implement.

Examples are rewritten and tested in Verilog and VHDL
Describes high-level applications as examples and provides the building blocks to implement them, enabling the student to start practical work straight away
Singles out the most important parts of the language that are needed for design, giving the student the information needed to get up and running quickly

Editorial Reviews

Review

"...a great book for someone wanting to learn HDL design as the examples are crystal-clear, and it can be hard to find real-world HDL examples on the ‘net. The chapter on a CPU design alone will teach one a lot about coding for FPGAs." --Embedded.com

"Design Recipes for FPGAs is an excellent volume for engineers who work with FPGAs either regularly or occasionally... the book provides a handy shelf reference with examples for many useful functional blocks, ranging from relatively small illustrative syntactic and structural examples to more complex concepts. Whether you work in VHDL occasionally or every day, you'll find practical help in this book." --Lewin Edwards, Design Engineer and Technical Author

Review

A rich toolbox of practical FPGA design techniques and templates that will enable you to solve practical problems using FPGAs – now updated with examples in Verilog

From the Back Cover

A rich toolbox of practical FPGA design techniques and templates that will enable you to solve practical problems using FPGAs – now updated with examples in Verilog

This book provides a rich toolbox of design techniques and templates to solve practical, every-day problems using FPGAs. Using a modular structure, it provides design techniques and templates at all levels, together with functional code, which you can easily match and apply to your application. Written in an informal and easy to grasp style, this invaluable resource goes beyond the principles of FPGAs and hardware description languages to demonstrate how specific designs can be synthesized, simulated and downloaded onto an FPGA. In addition, the book provides advanced techniques to create ‘real world’ designs that fit the device required and which are fast and reliable to implement.

Key Features Include:

Examples are rewritten and tested in Verilog and VHDL

Describes high-level applications as examples and provides the building blocks to implement them, enabling the student to start practical work straight away

Singles out the most important parts of the language that are needed for design, giving the student the information needed to get up and running quickly

Updates to this edition include:

All examples are rewritten and tested in Verilog

Additional Examples and Updates to previous Code

New mixed signal material in VHDL-AMS and Verilog-AMS

About the Author

Peter Wilson is Professor of Electronic Systems Engineering in the Electronic and Electrical Engineering Department at the University of Bath. After obtaining degrees at Heriot-Watt University in Edinburgh he worked as a Senior Design Engineer with Ferranti, Scotland and then as a Technical Specialist for Analogy, Inc. in Oregon, USA. After obtaining his PhD at the University of Southampton, he joined the faculty and was a member of the Academic staff at the University of Southampton from 2002 till 2015 when he moved to the University of Bath. He has published more than 100 papers and 3 books. Peter Wilson is also a Fellow of the IET, Fellow of the British Computer Society, a Chartered Engineer in the UK and a Senior Member of the IEEE.

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Design Recipes for FPGAs: Using Verilog and VHDL 2nd Edition

Design Recipes for FPGAs: Using Verilog and VHDL 2nd Edition

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Design Recipes for FPGAs: Using Verilog and VHDL 2nd Edition

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